大贤者
精华
|
战斗力 鹅
|
回帖 0
注册时间 2007-3-22
|
本帖最后由 Solite 于 2010-7-26 14:37 编辑
这楼歪的......
好吧,下一代的System Clock架构确实变了, 但跟Clock Generater其实没啥关系. 集成不集成,Clock Gen都只是负责output clock而已, 问题是现在CPU内部使用clock的机制变了.
LGA1156 的CPU吃3个clock:
CPU core 和 内存控制器吃BCLK 133MHz
DMI和PCIE Root port 吃 100MHz
embedded DisplayPort吃 120MHz
而SNB CPU就只吃2个clock:
CPU core, 内存控制器, DMI和PCIE Root port, iGFX core(就是集成显卡) 通通都吃 100MHz
embedded DisplayPort吃 120MHz
也就是说现在BCLK就是100MHz了, 调BCLK就会同时影响到PCEI,DMI跟iGFX, 不像以前只有CPU core跟内存控制器吃BCLK可以单独调.
总之Intel blablablabla了一大堆意思是说老子对这代Turbo mode很有信心, 调BCLK来超频的把戏不推荐你们玩呀!
所以, 且看各大主板厂如何发挥各自的神通吧.
有兴趣的可以看一些原文
[/free]PCH Clock –Clock chip that provides the 100-MHz host clock (BCLK) to the Sandy
Bridge processor. BCLK is the primary clock, from a Performance Tuning
standpoint, and is similar to RefClk in previous architectures. BCLK also affects
iGFX core frequencies and PEG/DMI. It does not directly affect PCIe coming out of
the PCH.
NOTE: BCLK in the Sandy Bridge processor and Cougar Point PCH platform does
not have as much margin as previous architectures. As such the primary
overclocking mechanism has shifted from BLCK to Turbo mode parameters
Performance Tuning no longer occurs in a significant sense at the clock chip as done in
previous architecture. Major parts of Performance Tuning will occur in the processor
itself. BCLK is supplied to the processor, and each one of the two cores or interfaces
(CPU and DRAM) will apply a multiplier to BCLK. In this platform it is expected that
BCLK overclocking may be limited due to architectural changes internal to the
processor. |
|