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战斗力 鹅
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注册时间 2009-11-21
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http://download.intel.com/design/processor/applnots/320354.pdf
White Paper
November 2008
Intel® Turbo Boost Technology
in Intel® Core™
Microarchitecture (Nehalem)
Based Processors
1.2 Dependencies / Algorithm
Intel® Turbo Boost technology core frequency
upside availability is ultimately constrained by
power delivery limits, but within those
constraints, it is limited by the following factors:
• The estimated current consumption of the
processor
• The estimated power consumption of the
processor
• The temperature of the processor
The number of active cores at any given instant
dictates the upper limit of Intel® Turbo Boost
technology. For this discussion, a core is
considered ‘active’ if it is in the “C0” or “C1” state;
cores in the “C3” or “C6” state are considered
‘inactive’. The upper limits will vary on a perprocessor
number basis. For example, one
particular processor may allow up to two
frequency steps (266.66 MHz) when just one core
is active and one frequency step (133.33 MHz)
when two or more cores are active. Therefore,
higher deep C-state residency (“C3” or “C6”) on
some cores will generally result in increased core
frequency on the active cores.
The upper limits are further constrained by
temperature, power, and current. These
constraints are managed as a simple closed-loop
control system. If measured temperature, power
and current are all below factory-configured limits
and the OS is requesting P0, the processor
automatically steps up core frequency (+133.33
MHz) until it reaches the upper limit dictated by
the number of active cores. When temperature,
power or current exceed factory configured limits
and you are above the base operating frequency,
the processor automatically steps down core
frequency (-133.33 MHz) in order to reduce
temperature, power and current. The processor
then monitors temperature, power, and current
and continuously re-evaluates. |
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发表于 2010-3-4 20:21
发表于 2010-3-4 22:44
我觉得研究这有啥用？手动超频的话这条都关掉的吧